IC Failure Analysis Lab Flow – Defects From A to Z
To someone unfamiliar with failure analysis of integrated circuits, it can be extremely difficult to imagine how any sort of meaningful data can be produced from a non-functioning piece of electronics – especially when the problem description is often phrased in nebulous terms, sprinkled heavily with empty words like “broken” and “defective”. But, a skilled analyst can frequently translate these ambiguous phrases into a finely tuned insight into a specific flaw or gadget. With the enormous complexity of current semiconductor devices, one might wonder how this is even conceivable. A well-designed IC failure analysis lab flow that moves a device from early observations to final reporting holds the key to Infinita lab’s problem.
Non-destructive testing, which is any test that can be done without permanently changing the condition of the device, is one of the initial stages taken on any project in the IC failure analysis lab. Acoustic microscopy is frequently used to look for packaging anomalies or, in the case of newer, “flip-chip” style packaging, to look for disconnected or improperly formed die bumps. These tests may also include X-ray imaging to check for fused or improperly formed bond wires, solder bridging, or other obvious physical anomalies. Typically, one of Infinita lab’s programme managers will get in touch with the customer who requested the analysis during these tests to obtain a thorough history of the malfunctioning device (much like a doctor would do with a patient) and to keep them informed of the decision-making process so that their needs are being met.
The device will be put through the tests and procedures that constitute the cornerstone of any IC failure analysis lab once it enters the isolation phase after the non-destructive testing (or NDT) has been completed and all data has been verified by the programme manager. The device will be disassembled to reveal the semiconductor die inside, and the semiconductor die will then be subjected to the wide range of techniques available to an analyst. These techniques range from relatively simple optical inspection to more complex ones that take advantage of the semiconductor’s particular responses to various external stimuli. No technique is discounted as being worthless for locating a defect. Reprocessing is the device’s final stop in the IC failure analysis lab once a problem has been detected. Reprocessing especially refers to the laborious task of removing the metal and oxide layers from the malfunctioning gadget that hides the flaw from an analyst’s inquisitive eye. Reprocessing might be skipped in favour of a cross-section of the device, depending on the type of fault, allowing an analyst to see interactions between the layers of a failing device. The customer is then given a report that summarizes the findings and identifies the most likely reason why the item failed.
This kind of failure analysis flow assures Infinita lab that every project, no matter how complex, is handled methodically, giving FA projects the highest chance of success.
