Differential Hall Effect Metrology DHEM Testing Services

Scope

DHEM enables detailed electrical characterization of semiconductor materials by separating layer-specific properties and improving measurement accuracy.

It supports advanced material analysis, process optimization, and quality control in semiconductor device fabrication.

• DHEM is a technique, not a published ASTM test method, so testing is performed against a documented laboratory procedure agreed with the customer.
• Depth profiles of active carrier concentration, Hall mobility, and resistivity come out of the method, together with the sheet resistance of the remaining layer at each removal step.
• Testing relies on a van der Pauw-compatible test structure, typically a Greek cross defined on an electrically isolated mesa.
• Substrate isolation is a must. The layer being profiled needs a p-n junction, an insulating layer such as a buried oxide, or a semi-insulating substrate to separate it.
• Silicon, germanium, and silicon-germanium layers are the most established materials; III-V compound layers can be profiled after dedicated removal-recipe development.
• Layers come off by oxidation and oxide stripping or by controlled etching. Each new material system generally needs its own validated recipe.
• To keep the differential calculation from depending on an assumed removal rate, removed thickness is verified at each step, commonly by spectroscopic ellipsometry.
• Corrections for surface depletion, backside depletion near a buried interface, and native oxide effects may be needed. That’s particularly true for very thin or lightly doped layers.
• It’s destructive: the profiled region of the test structure is consumed as the measurement proceeds.
• Related published methods, such as ASTM F76 for resistivity, Hall coefficient, and Hall mobility in single-crystal semiconductors, address bulk or single-layer Hall measurements. They can support a depth-resolved DHEM study but don’t replace it.

Applications

• Dopant activation in ultra-shallow junctions formed by ion implantation followed by rapid thermal, spike, or laser annealing.
• Profiling doped epitaxial layers and strained silicon-germanium or germanium films used in advanced transistor structures.
• Thin silicon-on-insulator and germanium-on-insulator layers, where substrate leakage would otherwise distort the measurement.
• Electrically active profiles can be compared against chemical dopant profiles from secondary ion mass spectrometry to quantify the inactive fraction.
• It supports process development and failure investigation for implant, anneal, and epitaxy steps in CMOS, RF, and power device manufacturing.
• III-V and other compound semiconductor layers can be characterized too, when a suitable removal recipe is available.

Benefits

• You get true electrical depth profiles of carrier concentration and mobility, not an inference from total atomic dopant content.
• Near-surface behavior is resolved with removal steps that published work has demonstrated to be below one nanometer in silicon and germanium systems.
• Mobility and resistivity are reported alongside concentration, which supports analysis of scattering, damage, and strain effects.
• The profile integrates into a sheet resistance value. Independent four-point probe measurements can cross-check it.
• It complements secondary ion mass spectrometry by separating electrically active dopants from the total chemical dopant population.
• Engineers can tune annealing and activation conditions using direct electrical evidence from the layer itself.